| BODY HEIGHT | 0.030 INCHES MINIMUM AND 0.065 INCHES MAXIMUM |
| BODY LENGTH | 0.245 INCHES MINIMUM AND 0.345 INCHES MAXIMUM |
| BODY WIDTH | 0.170 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
| DESIGN FUNCTION AND QUANTITY | 3 GATE, NAND |
| FEATURES PROVIDED | EDGE TRIGGERED AND HERMETICALLY SEALED AND MEDIUM POWER AND MEDIUM SPEED AND MONOLITHIC AND POSITIVE OUTPUTS |
| INCLOSURE CONFIGURATION | FLAT PACK |
| INCLOSURE MATERIAL | CERAMIC AND GLASS |
| INPUT CIRCUIT PATTERN | TRIPLE 3 INPUT |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| MAXIMUM POWER DISSIPATION RATING | 200.0 MILLIWATTS |
| OPERATING TEMP RANGE | -55.0 TO 90.0 CELSIUS |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS |
| TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |
| TERMINAL SURFACE TREATMENT | SOLDER |
| TEST DATA DOCUMENT | 22915-ST32903 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| TIME RATING PER CHACTERISTIC | 5.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 5.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -0.5 VOLTS MINIMUM POWER SOURCE AND 8.0 VOLTS MAXIMUM POWER SOURCE |